Faster and more energy-efficient low-dimensional semiconductor chips. As silicon-based chips gradually approach the physical limit of Moore's Law, both the scientific and industrial communities are constantly trying to utilize various two-dimensional materials to develop better next-generation chips. Recently, a team of academicians Peng Lianspear from the School of Electronics at Peking University and researchers Qiu Chenguang have developed a ballistic two-dimensional indium selenide (InSe) transistor, which is the world's fastest and lowest energy consumption two-dimensional semiconductor transistor. Its actual performance surpasses Intel's most advanced commercial silicon based transistor. The relevant research was recently published in the journal Nature. It is reported that the new transistor has a room temperature ballistic rate of 83%, which is much higher than the ballistic rate of silicon based transistors (below 60%), and is expected to achieve a chip that combines high performance and low power consumption. In a ballistic transport transistor, electrons pass through the channel like bullets without being collided, and there is no scattering loss of energy. Therefore, devices with higher ballistic rates have higher energy utilization efficiency, "Qiu Chenguang told China Science Daily. Several international reviewers believe that this study has solved multiple important challenges in achieving high-performance two-dimensional transistors and is an important milestone in the research of two-dimensional electronic devices, with significant scientific significance. Targeting key bottleneck chips as the "heart" of the information age, providing a continuous source of power for the development of big data and artificial intelligence. The increase in chip speed is attributed to the miniaturization of transistors, however, currently silicon-based chips are approaching the physical limit of Moore's Law. The computer industry has always followed Moore's Law, which states that when the price remains constant, it can accommodate twice as many transistors as the previous generation on a given integrated circuit area, thereby doubling its performance. However, years of practice have shown that while the performance of integrated circuits has improved, negative effects such as short channel effects have correspondingly increased, and the difficulty, energy consumption, and cost of integration have also increased. Two dimensional semiconductor materials are considered the next 'tuyere' for chip channel materials. This material with atomic thickness has the advantages of ultra-thin body and high mobility, which has aroused widespread interest in the scientific and industrial communities. In recent years, leading semiconductor manufacturing companies and research institutions around the world, such as Intel, TSMC, Samsung, and the European Microelectronics Research Center, have all conducted research on two-dimensional materials. However, due to bottlenecks in contact resistance, gate dielectric, and other aspects, so far, the performance achieved by all two-dimensional transistors cannot match the industry's advanced silicon-based transistors. Based on more than 10 years of research in the field of nanodevices, the Peking University team has focused on addressing the underlying core issues and key scientific bottlenecks in the field of two-dimensional electronics, hoping to tap into the ultimate potential of two-dimensional semiconductors in the field of electronics and prepare two-dimensional transistors that truly leverage the inherent advantages of low-dimensional materials. They chose two-dimensional indium selenide as the channel material, which has excellent physical properties far superior to similar materials. For example, with higher room temperature carrier mobility and smaller electron effective mass, the intrinsic thermal velocity of materials is higher. According to calculations, its electrical performance is superior to almost all known N-type semiconductor materials (including traditional silicon semiconductors). "Theoretically, transistors with two-dimensional indium selenide as channel have higher limiting performance." lead author of the paper, Peking University
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